SoC Digital Verification Engineer (m/f/d) (Ingenieur/in - Elektrotechnik)

Responsibilities

- As a member of the verification team you will develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors. You will apply sophisticated techniques to achieve verification with the highest quality, efficiency, and time-to-market You are going to work closely with the design team to ensure timely delivery of quality designs. You will also work with methods to accelerate verification time and will be involved in Post Silicon Validation.

Minimum Qualifications

- You should have a BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or equivalent experience.
- Ability to fluently speak & write in English.

Preferred Qualifications

- Hands-on experiences in SoC verification.
- Knowledge of SoC architecture/design and in-depth knowledge of verification flow.
- Strong understanding and proven experience in the sophisticated verification process, including dynamic, coverage-based and formal methods.
- Experience using some of the following: Perl, e, Verilog, System Verilog, C, C++, TCL.
- Familiarity with verification environments e.g. UVM, System Verilog is an advantage.
- Knowledge in formal, hardware acceleration is a plus.